Short Bio

Yongshik Kim, Ph.D.

  • CMOS process & device development
  • Embedded memory: EEPROM, ROM, DRAM, SRAM process/device development
  • Yield modeling
  • Yield ramp-up
  • Coded-defect reduction
  • In-house engineering tool development
  • Big data analysis using physics, statistics, and AI
  • Full-stack engineering platforms
  • Commercial web platform
  • Leadership of cross‑functional teams
  • Interdisciplinary integration
  • Strong problem-solving skills in tackling complex challenges

  • Record-breaking yield ramp-up in SRAM & mobile AP at Samsung
  • Multiple R&D and System LSI awards for yield excellence
  • Originated the Samsung SRAM team and yield-aware design methods
  • Published tutorial books for PI and SRAM engineers at Samsung Foundry
  • Published papers on SRAM technology and yield modeling
  • Built integrated platforms for autonomous defect/yield analysis
  • Launched an e-commerce web platform using WordPress

  • Foundry process integration
  • Embedded memory process integration
  • Foundry transistor development
  • SRAM bit cell and macro development
  • SRAM and Logic yield development
  • Customer support
  • Standard design kit preparation: Design Rules, SPICE model parameters
  • Big data analysis of process, device, and yield, using physics, statistics, and machine/deep learning
  • Full-stack web development for engineering and e-commerce
  • Leadership of cross-functional teams
  • Interdisciplinary integration
  • Strong problem‑solving skills grounded in taxonomy creation, structured decomposition, and data‑driven decision‑making

  • Peer‑Reviewed Papers: Published multiple journal and conference papers on semiconductor process optimization, yield improvement, and rare‑earth dielectric analysis.
  • Technical Reports: Authored internal Samsung reports on defect reduction, variability control, and yield‑aware design methodologies.
  • Conference Presentations: Presented at international conferences (VLSI, etc.), sharing innovations in CMOS process, SRAM yield ramp‑up, and AI‑driven wafer analysis.
  • Collaborative Research: Co‑authored with academic and industry partners, bridging applied electronics and data science for semiconductor manufacturing.

  • Semiconductor Fabrication: Yield Management, Yield Optimization, Yield Management Systems, Yield Improvement, Yield Enhancement, Parametric Yield, Defective Yield, Variability Reduction, Process Integration, Process Target Specification, MTS, ETS, LTS, YTS, BKM Management, Wafer Acceptance Electrical Test (WAT), Process Failure Mode Effects Analysis (PFMEA), Transistor, FinFET, TCAD, Reliability, Six Sigma, DOE, Design Rules, Design Rule Checking (DRC), HSPICE, HSPICE Model Parameter, Cadence Virtuoso Layout Suite, Foundry Customer Support
  • Semiconductor Modeling: Memory bit cell yield modeling, Small circuit yield modeling, Transistor Modeling, AI-assisted Development
  • Semiconductor Memory: Memory bit cell design, SRAM, DRAM, Flash Memory
  • Data Science: Statistical Analysis, Machine Learning, Deep Learning, ETL (Extract-Load-Transform), Full-stack web development, AI-assisted Development
  • Coding Language: C/C++, Microsoft Macro Assembler, Adobe PostScript, Perl, Python, Java, JavaScript, TypeScript, PHP, PowerShell, K-Shell
  • Software: Minitab, TIBCO Spotfire, JMP Statistical Discovery, Excel VBA, Python, PyTorch, Tensorflow, Keras, SQL, MongoDB, Redis, Flask, Node.js, WordPress, Github, Docker, Gemini, Copilot, Claude, Amazon Q/Kiro

Welcome!

    I led technical teams by creating a clear taxonomy of complex problems, breaking them into structured components, and driving data‑based decisions that guide the team toward scalable, high‑impact solutions.
    My background spans two asymmetric but complementary tracks: hybrid technical expertise and dual‑track leadership. Hybrid technical expertise bridges semiconductor technology and computer science. Dual‑track leadership combines independent engineering with cross‑generational team management.
    I specialize in semiconductor foundry engineering, data science, and full‑stack development to enable scalable innovation. My hybrid expertise emerged from driving foundry development and early ramp‑up, resulting in the SRAM macro yield model and record‑setting yield improvements in SRAM and mobile AP products. I created the Z‑method for SRAM macro yield modeling and applied machine learning and deep learning to massive wafer datasets for predictive analysis and yield optimization. I also built full‑stack engineering platforms that integrate databases, analytics, and web applications to streamline engineering workflows. I served as the Subject Matter Expert (SME) in SRAM yield modeling.
    As a proven leader, I guided cross‑functional teams to deliver innovation, efficiency, and customer‑focused outcomes.

  • Semiconductor Process & Device Development
    Developed advanced CMOS processes and transistor technologies, optimizing device performance, reliability, and scalability to meet demanding industry standards and enable next-generation semiconductor innovations.
  • SRAM Macro Yield Modeling
    Developed the statistical SRAM yield model presented at VLSI Technology and standardized at Samsung. Directed bit-cell optimization and yield ramp-up using the model.
  • Yield Ramp-Up & Product Success
    Achieved rapid yield ramp-up for SRAM and mobile AP products, implementing defect reduction strategies, and delivering record-breaking production success, recognized with the SAMSUNG award.
  • Customer Enablement & Collaboration
    Partnered with leading clients such as Qualcomm, NVIDIA, Apple, and Samsung, providing technical enablement, collaborative solutions, and ensuring customer success across diverse semiconductor products.
  • Data Science & AI Integration
    Applied machine learning and deep learning to massive wafer datasets, enabling predictive analysis, defect detection, and yield optimization through advanced data-driven semiconductor engineering.
  • Full-Stack Engineering Platforms
    Built integrated platforms combining databases, analytics, and web applications, streamlining semiconductor data workflows, and empowering engineers with scalable, automated yield analysis tools.
  • Full-Stack E-Commerce Platforms
    Built B2C cosmetic‑retail web platforms with WordPress, PHP, JavaScript, and MySQL, while delivering advanced PHP‑based customizations across e‑commerce systems, including feature extensions and workflow enhancements.
  • Leadership & Team Management
    Led cross-functional engineering teams, fostering collaboration, driving innovation, and achieving project objectives with a strong focus on customer success and organizational excellence.