Comparison of Multi‑Project Chip (MPC) Vs. Multi‑Project Wafer (MPW)
Abstract
Multi‑Project Chip (MPC) and Multi‑Project Wafer (MPW) fabrication models are cost‑sharing semiconductor manufacturing arrangements that enable multiple designs to be produced within a single wafer run. Although both approaches reduce mask and wafer costs, they differ significantly in structure, risk, flexibility, and intended use. This summary synthesizes authoritative descriptions from semiconductor manufacturing literature and online technical references to provide a concise comparison of MPC and MPW.
1. Introduction
MPC and MPW were developed to allow customers to share tooling and wafer fabrication costs across multiple designs Wikipedia grokipedia.com. These approaches are widely used in prototyping, research, and early‑stage product development, where full mask‑set costs are prohibitive. MPW originated in the 1970s to reduce NRE and accelerate time‑to‑market for IC prototyping AnySilicon.
2. Definitions
2.1 Multi‑Project Chip (MPC)
An MPC integrates multiple IC designs into a single composite chip, and this composite chip is repeated across the entire wafer during manufacturing Wikipedia grokipedia.com. Each die on the wafer contains the same combination of designs.
2.2 Multi‑Project Wafer (MPW)
An MPW aggregates multiple independent chip designs on a single wafer, each occupying its own die area, with potentially different quantities per wafer Wikipedia grokipedia.com.
3. Purpose and Use Cases
MPC
- Used for manufacturing acceptance, process characterization, and multi‑design experiments, often including PCM (process control monitor) structures Wikipedia.
- Suitable when multiple small designs or test structures must be evaluated under identical process conditions.
MPW
- Designed for ASIC prototyping, low‑volume production, and research, enabling cost‑effective fabrication for startups, universities, and IP vendors AnySilicon.
- Supports diverse chip sizes and pad configurations.
4. Mask and Layout Structure
MPC
- One mask layout contains a single composite chip with all designs embedded.
- The composite chip is tiled across the wafer, producing roughly equal numbers of each design Wikipedia.
MPW
- The mask contains multiple separate chip layouts, enabling different die sizes and quantities per wafer Wikipedia grokipedia.com.
- Enabled by modern photolithography and multi‑layer mask (MLM) techniques koalgun76.tistory.com.
5. Testing Characteristics
MPC
- All designs share one die; PCM structures are often included for process quality verification Wikipedia.
- Testing is integrated but less isolated—failures may be harder to attribute to individual blocks.
MPW
- Each chip has its own pad ring and test strategy, enabling independent testing of each design.
- Ideal for validating standalone ASICs.
6. Risk Profile
MPC
- High coupling risk: a defect in any block affects the entire composite chip, and thus every die on the wafer Wikipedia.
- Useful for process monitoring but less robust for product‑level prototyping.
MPW
- Low coupling risk: each chip is isolated; one design’s failure does not impact others Wikipedia grokipedia.com.
- Preferred for commercial prototyping.
7. Cost Structure
MPC
- Extremely cost‑efficient when many small designs share one composite chip; mask area is used efficiently Wikipedia.
MPW
- Reduces mask‑set cost by sharing expensive photomasks among many customers AnySilicon.
- Slightly higher per‑design cost than MPC due to independent die footprints.
8. Typical Users
MPC
- Foundry R&D teams
- IP developers
- Process characterization groups
- Mixed‑signal/analog researchers
MPW
- Startups and fabless companies
- Universities and research institutions (e.g., MOSIS, Europractice)
- IP vendors
- Customers using foundry shuttle programs
9. Conclusion
MPC and MPW both enable cost‑effective semiconductor fabrication, but they serve distinct purposes. MPC is optimized for multi‑design integration and process characterization, while MPW is the industry standard for ASIC prototyping and low‑volume production. Their differences in risk, flexibility, and testability make them complementary tools in modern semiconductor development.
References
Wikipedia Multi‑Project Wafer Service, Wikipedia
grokipedia.com Multi‑Project Wafer Service, Grokipedia
AnySilicon Multi‑Project Wafer – History, Overview & Booking System, AnySilicon
koalgun76.tistory.com MPC/MPW Service Overview, Koalgun Technical Blog
Nature Multi‑Project Wafers for Flexible Thin‑Film Electronics, Nature (2024)
